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| 74LV107PW | Dual JK flip-flop with reset; negative-edge trigger | Philips Semiconductors | SOT402 | - | N/A | N/A | 74LV107PW datasheet (121K) |
| 74LV109D | Dual JK(not) flip-flop with set and reset; positive-edge trigger | Philips Semiconductors | SOT109 | - | N/A | N/A | 74LV109D datasheet (124K) |
| 74LV109DB | Dual JK(not) flip-flop with set and reset; positive-edge trigger | Philips Semiconductors | SOT338 | - | N/A | N/A | 74LV109DB datasheet (124K) |
| 74LV109N | Dual JK(not) flip-flop with set and reset; positive-edge trigger | Philips Semiconductors | SOT38 | - | N/A | N/A | 74LV109N datasheet (124K) |
| 74LV109PW | Dual JK(not) flip-flop with set and reset; positive-edge trigger | Philips Semiconductors | SOT403 | - | N/A | N/A | 74LV109PW datasheet (124K) |
| 74LV10D | 3.6 V, Triple 3-input NAND gate | Philips Semiconductors | SO | 14 | -40°C | 125°C | 74LV10D datasheet (113K) |
| 74LV10DB | 3.6 V, Triple 3-input NAND gate | Philips Semiconductors | SSOP | 14 | -40°C | 125°C | 74LV10DB datasheet (113K) |
| 74LV10DB | 3.6 V, Triple 3-input NAND gate | Philips Semiconductors | SSOP | 14 | -40°C | 125°C | 74LV10DB datasheet (113K) |
| 74LV10PW | 3.6 V, Triple 3-input NAND gate | Philips Semiconductors | TSSOP | 14 | -40°C | 125°C | 74LV10PW datasheet (113K) |
| 74LV11D | 3.6 V, Triple 3-input AND gate | Philips Semiconductors | SO | 14 | -40°C | 125°C | 74LV11D datasheet (113K) |